REF_CLK_SEL=CLK_TIMER
Profile counter configuration
| CNT_DURATION | This field specifies if events (edges) or a duration of the monitor signal is counted. ‘0’: Events are monitored. An edge detection is done. All edges of the selected monitor signal are counted. ‘1’: A duration is monitored. No edge detection is done. The monitored signal is taken as a (high active) level signal for enabling the profiling counter. Note: All monitor signals which only can represent events are edge encoded in hardware, therefore a selection of CTL.CNT_DURATION=1 will not produce meaningful results. |
| REF_CLK_SEL | This field specifies the reference clock used for a counting time base when counting durations. Has no effect when CTL.CNT_DURATION=0. 0 (CLK_TIMER): Timer clock (divided or undivided high frequency clock, e.g. from IMO). Selection is done in SRSS register CLK_TIMER_CTL.TIMER_SEL. 1 (CLK_IMO): IMO - Internal Main Oscillator 2 (CLK_ECO): ECO - External-Crystal Oscillator 3 (CLK_LF): Low frequency clock (ILO, WCO or ALTLF). Selection is done in SRSS register CLK_SELECT.LFCLK_SEL. 4 (CLK_HF): High frequuency clock (‘clk_hfx’). 5 (CLK_PERI): Peripheral clock (‘clk_peri’). 6 (RSVD_6): N/A 7 (RSVD_7): N/A |
| MON_SEL | This field specifies the montior input signal to be observed by the profiling counter. The monitor signals are product specific, see product definition spreadsheet tab ‘Monitor’ for details. |
| ENABLED | Enables the profiling counter: ‘0’: Disabled. ‘1’: Enabled. |